PEDSL Architecture
Discover the AI-native platform that makes atomic-scale precision viable at production throughput.
The problem AAT was built to solve
ALE has been an understood technique for decades. The reason it hasn't replaced RIE in high-volume manufacturing isn't precision — it's throughput. Conventional ALE cycle times of 20 to 90 seconds make it impractical at the steps where fabs need it most. The reason cycle times are that slow is architectural.
Coupled single-chamber architecture
optimize one · sacrifice the other
Conventional tools couple the modification and removal steps in a single chamber, forcing compromises in both — optimize for one and you sacrifice the other. The result is what the industry calls “pseudo-ALE”: a process that resembles ALE but doesn't deliver the true self-limiting behavior that atomic-scale control requires.
What PEDSL means
PEDSL — Process Engineering Domain Specific Language — is the AI-native control layer at the heart of AAT's platform. It is not a software dashboard bolted onto an existing tool. It is the operating system through which the entire etch process is defined, executed, and optimized in real time.
Process Engineering DSL (PEDSL)
SPIE Advanced Lithography + Patterning 2026 | Paper 13984-24
The PEDSL control loop
The decoupled chamber architecture
The core hardware innovation is the physical separation of the modification and removal steps. AAT's chamber uses a Top Plasma Source (TPS) and independent gas injection lines that allow each step to be optimized entirely independently — without compromise between the two.
This decoupling is what makes both high-throughput and high-precision modes possible in the same chamber. It is also what enables true self-limiting behavior — because the modification step is no longer constrained by the removal step's requirements, it can saturate completely before removal begins.
Decoupled ALE System Architecture
Decoupled ALE system architecture
AI-native process control
In a conventional ALE tool, recipe development is manual. An engineer adjusts gas flow, RF power, pressure, and timing iteratively — a process that can take weeks before a production-worthy process window is found.
Conventional ALE
Manual recipe development
In AAT's platform, an ML optimizer runs continuously during process execution. It takes a process scorecard as input — target EPC, synergy factor, saturation curve — and adjusts modification parameters, gas purging timing, and removal parameters in real time to hit those targets. The feedback loop closes through real-time sensors and in-line metrology.
AAT platform
Closed-loop auto-tuning
The result is faster recipe convergence, tighter within-wafer uniformity, and a process that adapts automatically as conditions drift — without operator intervention.
Two operating modes. One chamber.
AAT's platform delivers two validated methods from a single chamber, switched algorithmically based on the process requirement:
- Synergy Factor>90%
- Linearity (R²)>0.9997
- Cycle Time~2 seconds
- Primary applicationBulk selective recess
- Synergy Factor>80%
- Linearity (R²)>0.9947
- Cycle Time~2 seconds
- Primary applicationSurface finishing, CD control
Both modes demonstrate R² > 0.99 etch linearity — confirming that total etch depth is a precise, predictable function of cycle count. No drift. No guesswork.
Source: SPIE Advanced Lithography + Patterning 2026, Paper 13984-24
Self-limiting behavior
The defining characteristic of true ALE is self-limitation: the process saturates at a fixed etch depth regardless of how long each step runs. AAT's saturation data, published at SPIE 2026, confirms this:
Self-limiting saturation
Å / time →- Modification step~2.0 Å 1 second
- Removal step~2.1 Å 1 second
Both steps saturate at 1 second – meaning the ~2 second total cycle time is not an approximation. It is the natural consequence of both steps completing their self-limiting behavior. This is the data that makes the 10× cycle time claim credible.
Source: SPIE Advanced Lithography + Patterning 2026, Paper 13984-24
Competitive position
AAT's platform was benchmarked against published state-of-the-art results at SPIE 2026:
| Process | EPC | Synergy | Cycle Time | Reference |
|---|---|---|---|---|
| AAT BKM1 (this work) | 90 Å | >90% | ~2s | SPIE 2026 |
| AAT BKM2 (this work) | 2.3 Å | >80% | ~2s | SPIE 2026 |
| CCP H₂/NF₃ (TEL) | 61 Å | >80% | ~30s | Sherpa, JVSTA 2017 |
| ICP H₂/NF₃ (Micron) | ~90 Å | >80% | 5–30s | Rui, JVSTA 2023 |
| Thermal TMA/HF | 1.06 Å | ~40% | ~90s | Junige, Chem. Mater. 2024 |
Source: SPIE Advanced Lithography + Patterning 2026, Paper 13984-24
Same synergy as the best published conventional ICP ALE. Cycle time 10× faster. Independent step control that none of the comparison tools offer.
